Clock coupling into a USB differential pair
CLK133 runs parallel to the differential pair, while asymmetric vias increase mode conversion.
ENGINEERING FLOW
01Understand→
02Control→
03Verify→
04Resolve→
05Document
CASE-BASED DIAGNOSIS
Do not start by swapping parts. Build a falsifiable hypothesis.
Start with the failing frequency, identify plausible sources, then follow return paths, shared impedance, and cable paths to gather evidence.
399MHz
375MHz
466MHz
FREQUENCY RELATION → PHYSICAL PATH → PROOF01 / SIX CLOSED LOOPS
Turn each case into a reusable diagnostic structure.
Switch cases to see how source, coupling path, antenna, and victim connect. Every conclusion includes an executable verification action.
SOURCEPATHANTENNA / VICTIM
Clock coupling into a USB differential pair
- PATH HYPOTHESIS
- CLK133 runs parallel to the differential pair, while asymmetric vias increase mode conversion.
- VERIFICATION ACTION
- Relocating the clock route and vias moves the 399 MHz peak with the suspected path.
Same function, faster edge
The replacement part has a shorter rise time, extending emission energy into higher bands.
LED route crosses a split before reaching an external cable
Board-level digital noise couples through the LED route and connector into the Ethernet cable.
Clock and interface IC share a noisy supply
Shared supply impedance transfers clock noise into the interface, where the cable becomes the effective antenna.
Isolation components still carry a common-mode path
Parasitic capacitance across multiple optocouplers creates a common-mode path in the EFT spectrum.
Protection device present, discharge path ineffective
The TVS is too far from the connector; branch inductance raises residual voltage at the sensitive node.
02 / HYPOTHESIS BUILDER
Start from the symptom and build the first verification sequence.
The tool organizes hypotheses; it does not replace measurement. Change one variable at a time to move from ‘it works’ to ‘we know why.’
A / OBSERVED SYMPTOM
B / ENGINEERING PHASE
OBSERVEHYPOTHESISVERIFY
FIELD HYPOTHESIS · TRANSIENT-PATH LOCALIZATION
MEASUREMENT REQUIRED
Discharge current may share impedance with reset, power, or reference circuitry before reaching its intended diversion path.
FIRST DISCRIMINATING TESTS
View resources for ESD reset ↗Generated for Pre-compliance · Organizes an engineering hypothesis; does not replace measurement01
Trace the shortest discharge-current path
→02
Monitor RESET and supply-rail transients
→03
Compare TVS placement, loop inductance, and clamping margin
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