Do not just read rules. Change the physical condition.
Each lab isolates one core variable so edges, return paths, component parasitics, mode conversion, and transient paths become observable.
Use one coordinate system to explain three failure modes.
Change observation frequency and failure mode to compare path length, wavelength, and coupling structure.
The return current detours 80 mm around a plane gap; the same geometry becomes electrically larger as frequency rises.
Rise time governs the spectrum boundary.
Move clock and edge controls to see which odd harmonics enter the estimated EMI bandwidth.
A low fundamental can still have a fast edge.
Use fedge ≈ 1/(πTr) to estimate the trapezoidal edge-spectrum breakpoint. It is not a hard cutoff; package, drive impedance, ringing, and duty cycle alter the measured spectrum.
A plane gap can turn a small loop into an antenna.
Toggle reference continuity to observe return-current detour and loop-area change.
Signals follow traces. Current follows loops.
Example geometry: 50 mm signal length and 0.2 mm reference spacing; the split case uses a 20 mm detour width and 110 mm return path. Real current distribution requires stackup-aware 3D analysis or measurement.
Change C and ESL to locate self-resonance.
Package and layout jointly determine high-frequency capacitor behavior.
Above self-resonance, a capacitor begins to behave like an inductor.
This is why more capacitance does not necessarily improve high-frequency EMI. Component, package, layout, source impedance, and load impedance must be verified together.
Placement changes the path; the path changes residual voltage.
Switch between near and remote TVS placement, then trigger an 8 kV pulse.
Intercept at the entry and divert through a short, wide path.
The protection device sits at the connector, so current reaches the TVS before the protected trace and the diversion loop avoids sensitive circuitry.
Select a case and replay the evidence chain.
Six cases cover frequency attribution, path evidence, and one-variable verification.
Clock coupling into a USB differential pair
- PATH HYPOTHESIS
- CLK133 runs parallel to the differential pair, while asymmetric vias increase mode conversion.
- VERIFICATION ACTION
- Relocating the clock route and vias moves the 399 MHz peak with the suspected path.